A Dual-Band LC-VCO with Low Power Low Phase Noise
碩士 === 國立交通大學 === 電信工程系所 === 95 === The research described in this thesis focuses on the design of a low power consumption and phase noise LC-VCO. With the current-reused topology, the proposed LC-VCO can operate using only half amount of DC current compared with the conventional topologies to achie...
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ndltd-TW-095NCTU54351182019-05-15T20:07:00Z http://ndltd.ncl.edu.tw/handle/6my23z A Dual-Band LC-VCO with Low Power Low Phase Noise 低功率、低相位雜訊之雙頻帶電壓控制振盪器設計 Feng-Chi Chan 詹豐吉 碩士 國立交通大學 電信工程系所 95 The research described in this thesis focuses on the design of a low power consumption and phase noise LC-VCO. With the current-reused topology, the proposed LC-VCO can operate using only half amount of DC current compared with the conventional topologies to achieve low power consumption. Here, we also propose to add an external resistor at the substrate node of the NMOS transistor, which reduces the substrate thermal noise of the NMOS transistor effectively and the phase noise of the LC-VCO as well. Based on proposed topology and novel method, we implement a low power and low phase noise dual-band LC-VCO, which operates at 2.5/3.5 GHz. The proposed dual-band LC-VCO is implemented by TSMC 0.18-μm 1P6M CMOS process and the measured results are similar to simulation ones. Therefore, the performances of the proposed LC-VCO achieve anticipation. The result shows that the phase noise reduction is about 7.0 dB and 4.0 dB at 10-kHz and 1-MHz offset frequency, respectively. With only 1.3 V bias voltage and 3.12 mW power consumption, the proposed LC-VCO operates 2.5 GHz and 3.5 GHz with phase noise of -121 dBc/Hz and -117 dBc/Hz, respectively, at 1 MHz offset frequency. Jenn-Hwan Tarng 唐震寰 2007 學位論文 ; thesis 88 en_US |
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碩士 === 國立交通大學 === 電信工程系所 === 95 === The research described in this thesis focuses on the design of a low power consumption and phase noise LC-VCO. With the current-reused topology, the proposed LC-VCO can operate using only half amount of DC current compared with the conventional topologies to achieve low power consumption. Here, we also propose to add an external resistor at the substrate node of the NMOS transistor, which reduces the substrate thermal noise of the NMOS transistor effectively and the phase noise of the LC-VCO as well. Based on proposed topology and novel method, we implement a low power and low phase noise dual-band LC-VCO, which operates at 2.5/3.5 GHz. The proposed dual-band LC-VCO is implemented by TSMC 0.18-μm 1P6M CMOS process and the measured results are similar to simulation ones. Therefore, the performances of the proposed LC-VCO achieve anticipation. The result shows that the phase noise reduction is about 7.0 dB and 4.0 dB at 10-kHz and 1-MHz offset frequency, respectively. With only 1.3 V bias voltage and 3.12 mW power consumption, the proposed LC-VCO operates 2.5 GHz and 3.5 GHz with phase noise of -121 dBc/Hz and -117 dBc/Hz, respectively, at 1 MHz offset frequency.
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author2 |
Jenn-Hwan Tarng |
author_facet |
Jenn-Hwan Tarng Feng-Chi Chan 詹豐吉 |
author |
Feng-Chi Chan 詹豐吉 |
spellingShingle |
Feng-Chi Chan 詹豐吉 A Dual-Band LC-VCO with Low Power Low Phase Noise |
author_sort |
Feng-Chi Chan |
title |
A Dual-Band LC-VCO with Low Power Low Phase Noise |
title_short |
A Dual-Band LC-VCO with Low Power Low Phase Noise |
title_full |
A Dual-Band LC-VCO with Low Power Low Phase Noise |
title_fullStr |
A Dual-Band LC-VCO with Low Power Low Phase Noise |
title_full_unstemmed |
A Dual-Band LC-VCO with Low Power Low Phase Noise |
title_sort |
dual-band lc-vco with low power low phase noise |
publishDate |
2007 |
url |
http://ndltd.ncl.edu.tw/handle/6my23z |
work_keys_str_mv |
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