Belief Propagation Based Decoding Schedules for Low-Density Parity Check Codes and their Behavior Analysis

• Main Authors: Shihyao Wang, 王詩堯
• Other Authors: Yu T. Su
• Format: Others
• Language: en_US
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/5yks59

碩士 === 國立交通大學 === 電信工程系所 === 95 === Low density parity check (LDPC) codes form a class of sparse graph codes that offer powerful error-correcting capability. For decoding LDPC codes, the belief propagation (BP) or sum-product algorithm (SPA) is usually used. However, implementation of a BP-based LDPC decoder often requires large memory space and very high degree of parallelism using many component soft-in soft-output (SISO) decoding units and complex interconnect network to perform message passing from variable nodes to check nodes or vice versa. An obvious solution for a relatively long code is to divide a decoding iteration into several serial sub-iterations in which a sub-iteration performs only part of the complete parallel message-passing operation. There are several architectures and decoding schedules for serial implementation of LDPC decoders. We are interested in two of the more popular ones, namely, the horizontal shu²ed BP (HSBP) and the vertical shuffed BP (VSBP) algorithms. It has been shown that, with a proper architecture and scheduling, such parallel-serial decoding methods not only require less storage space but also give faster convergence and, sometimes, better performance. A shortcoming of these existing schedules is that they are more concerned with reduction of memory and interconnect complexities and do not consider the short cycle effect which is the dominant factor limiting a BP-based algorithm's bit error rate (BER) performance. We propose a simple scheduling approach for reducing the short-cycle effect in a BP-based decoding algorithm. The impact of a short cycle can be lessened if one alternates the decoding schedule so that the cycle length can be effectively extended. The HSBP and VSBP algorithms partition the check or variable nodes into several groups where a group consists of (almost) the same number of consecutive nodes according to the natural order of the parity-check matrix and carry out the BP process group-by-group. Our algorithm groups the check nodes according to the number of short cycles a node is involved. Message-passing to a group with more short cycles is given lower priority in our decoding schedule. The resulting decoding algorithm is referred to as the cycle-based HSBP (or VSHP) algorithm. Another major contribution of this thesis is the development of a convenient and effective method to explain and predict both the performance and the convergence be- havior of a candidate LDPC code and the corresponding decoding algorithm/schedule.We define a function called message profile that describes the composition of the ex- trinsic information associated with a bit node. This function measures how much each bit node has contributed to the extrinsic information of a bit from the beginning of the decoding process up to the end of a given iteration. The normalized correlation spread (NCS) of a bit, defined as the mean-to-root-mean-squared ratio of its message profile, is then used to evaluate the degree of local flooding uniformity of a bit node in a particular iteration. The NCS of a bit node usually converge in just a few iterations and more importantly, all NCS' converge to the same steady-state value though not uniformly. Numerical results indicate that a BP-based algorithm converges when the NCSs of all bits converge, i.e., the convergence of the message-profile functions is consistent with convergence of the decoder. Furthermore, it is found that the decoder performance is directly related to the common steady state value{the larger it is, the better the BER performance becomes.