Advanced Control and Protection Techniques for DC-DC Switched Mode Power Supply IC Design

• Main Authors: Feng-Fei Ma, 馬鳳飛
• Other Authors: Jiin-Chuan Wu
• Format: Others
• Language: en_US
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/81221953360979826270

博士 === 國立交通大學 === 電子工程系所 === 95 === In this dissertation, we discuss about the switched mode power supply (SMPS) for DC-DC power conversion. Basic topologies of non-isolated DC-DC SMPS are introduced. Safety considerations for power supply design are discussed. The design specifications are also included. Based on the knowledge of DC-DC SMPS, we developed several new circuit techniques to achieve high conversion efficiency, compact converter size, wide operating range, fast transient response and safety operation. These developed circuit techniques were realized in a monolithic current-mode buck converter. The application of these circuit techniques can be extended to other topologies like boost and buck-boost of SMPS design, especially in integrated circuit power converter design. The on-chip soft-start circuit occupies a small silicon area and eliminates the need of extra pin-out. This circuit achieves one to tens of milliseconds soft-start time using series MOS transistors and a small on-chip capacitor. This circuit prevents the inrush current during the start-up of the power module. It provides safety operation and shrinks the converter size in the same time. Another benefit of the proposed circuit technique is that because of its simplicity, it can be easily adopted for any other power supply IC design. The dynamic partial shutdown strategy (DPSS) is a power management strategy. By exploiting the switching characteristics of SMPS, we developed this strategy. This strategy eliminates the unwanted waste of operating current and keeps the circuit performance at the same time. The DPSS improves the conversion efficiency especially in light load operation. Thus the standby time of battery operated devices can last longer by utilizing DPSS. Combined with the pulse frequency modulation (PFM) mode, the conversion efficiencies are improved from 62 % ~ 75 % to 84 % ~ 89 % measured in our test chip. In our design, we choose a quasi-lossless current conveyor based current sensing technique to implement our current-mode control. By exploiting the characteristics of this current sensing technique, we developed the slope compensation circuit and the over-current protection circuit. The proposed slope compensation circuit has reduced circuit complexity than traditional ones thus the silicon area is saved. The signal distortion is also reduced because we eliminate the multi-conversions of signals. The over-current protection is also simpler than traditional ones. The benefits of the over-current protection circuit are reduced silicon area, reduced power consumption and faster response for safety operation. Additionally, these circuits can be easily designed and adjusted. So we can achieve good regulation and wide operating range. These circuit techniques can also be applied to other topologies for different applications. Incorporating with other basic protection schemes, the above techniques are integrated into a demo chip. From the measurement results, we can see the effectiveness of these developed techniques. A monolithic current-mode pulse width modulation (PWM) step-down DC-DC converter with 96.7% peak efficiency is presented. The high efficiency is achieved by DPSS which enhances circuit speed with less power consumption. Automatic PWM and PFM switching boosts conversion efficiency during light load operation. The modified current sensing circuit and slope compensation circuit simplify the current-mode control circuit and enhance the response speed. A simple high-speed over-current protection circuit is proposed with the modified current sensing circuit. The new on-chip soft-start circuit prevents the power on inrush current without additional off-chip components. The DC-DC converter has been fabricated with a 0.6 贡m CMOS process and measured 1.35 mm2 with the controller measured 0.27 mm2. Experimental results show that the novel on-chip soft-start circuit with longer than 1.5 ms soft-start time suppresses the power-on inrush current. This converter can operate at 1.1 MHz with supply voltage from 2.2 V to 6.0 V. Measured power efficiency is 88.5 ~ 96.7% for 0.9 mA to 800 mA output current and over 85.5% for 1000 mA output current.