| Summary: | 碩士 === 國立交通大學 === 工業工程與管理系所 === 95 === In recent years, the semiconductor industry reduces the production costs by increasing the wafer size and enhancing the yield. When the wafer size is small, the quality information of a wafer can be obtained by measuring few fixed-points on a wafer. As the wafer size increases, few fixed-points on wafer are no longer sufficient to provide adequate information to correctly estimate the wafer quality characteristic. However, because the wafer inspection procedure is quite time-consuming and costly, more measurement points will increase the inspection cost. Therefore, the objective of this study is to design a sampling and simulation method for measurements on wafers. First, a few representative measurement points are sampled. These measurement are utilized to simulate other points on wafers to reduce the sampling cost and obtain sufficient wafer information. The proposed method utilizes clustering analysis to analyze the distribution of wafer measurement points. The results are utilized to decide the position of the representative die measurements. Simulated measurement points are obtained using the representative measurement points for other positions of the die measurements which are not sampled. The proposed method can reduce the inspection cost and cycle time. Actual 8-inch wafer data from an integrated circuit company in Taiwan are used to verify the effectiveness of the proposed procedure.
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