| Summary: | 碩士 === 國立成功大學 === 電機工程學系碩博士班 === 95 === In this thesis, we propose a fast intra prediction mode selection algorithm. Not only inner information of the block but also the characteristics of the surrounding pixels are considered to produce the vertical and horizontal differences. By taking the advantage of the relationship between these differences, the predictor can efficiently detect the feature of the block. Then, a part of appropriate modes are selected as candidate prediction modes according to this algorithm. Further, this algorithm is implemented into hardware architecture. Besides, three intra predictors in the baseline profile are also exploited based on the real time requirement and hardware area consideration.
The simulation results show that the proposed algorithm reduces the number of modes efficiently. With the similar video quality to full search, the algorithm improves overall performance with fewer increment of the bit-rate. Total area is about 39.8k gates, and the maximum frequency is 55.56 MHz. For real-time requirement, the design can achieve the maximum frame size is 4XGA (2048×1536) while the sequence format is 4:2:0 and the frame rate is 30 frames per second.
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