Built-In Self Diagnosis of Pipelined A/D Converters
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 95 === The main purpose of this thesis focuses on the design and diagnosis of a 50 MHz 8-bit pipelined ADC. The supply voltage of this ADC is 3.3 V and the output voltage range of each pipelined stage is from 1.15 V to 2.15 V. In the proposed Built-In Self Diagnosis...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/83927857838766068751 |