| Summary: | 碩士 === 中興大學 === 電機工程學系所 === 95 === With the progress of the times, the development that the wireless local area network(WLAN) technology has been already fast gradually. The research of WLAN is going on towards high throughput, high speed and low power consumption, but it is limited that the whole world bandwidth. In order to accord with the demand of the above, therefore the OFDM technology appears. OFDM is one kind of multi-carrier transmission technology. The carriers are orthogonal and overlapped, so that it can reduce bandwidth about 50%. However, OFDM is very sensitive in carrier frequency offset. It will cause inter-carrier interference and the orthogonal singles are destroyed. There are other bad effects like timing offset, sampling clock offset and channel interference etc. They all make the system performance worse. Thus, it is necessary to have a good synchronous circuit to reduce the above-mentioned interference in the receiver. We treat some problems about symbol boundary detection, carrier frequency offset detection and compensation in time domain. Besides, residue carrier frequency offset detection and sampling clock offset will be compensated by phase tracking loop in frequency domain. From simulation results, we need phase tracking loop to get good performance in high QAMs modulation. In hardware design, we use coordinate rotation digital computer(CORDIC) to substitute the direct digital frequency synthesizer(DDFS), and we propose an effective architecture doing packet detection and carrier frequency offset detection.
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