A Metrology to Explore Collar TEOS Integrity of Deep-Submicron DT DRAM Capacitor with a Vertical Parasitic NMOSFET
碩士 === 明新科技大學 === 電子工程研究所 === 95 === In this thesis, we propose an adequate measurement metrology to nondestructively verify the integrity of dielectric gap-fill in a deep trench (DT) capacitor of deep-submicron DRAM product. Because of the geometric structure in the DT capacitor, the vertical cylin...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/49262179321064969887 |