Implementation of Video Display Image Processing Based on SOC Platform

• Main Authors: Chien-Kai Yang, 楊建凱
• Other Authors: Yu-Jung Huang
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/15885515911911067235

碩士 === 義守大學 === 電子工程學系碩士班 === 95 === This thesis presents the implementation of video display image processing platform. The image process analysis is based on histogram and spatial filter convolution and wavelet. The main purpose of the digital image processing is to enhance the overall viewing aesthetics of the displayed images. The input image is capture through two CMOS lenses. The image display platform can perform picture in picture display function for the original image and the processed image. The above mentioned image process analysis was synthesized using Altera’s Quartus II 6.0, which is an integrated environment for logic design and synthesis. After finishing the verilog simulation, we download the program into FP2C35F672C6 chip to perform hardware verification of the implemented design. Finally, the platform utilizing picture-in-picture display indicates the real time image processing results