Fault-Tolerant Verification Platform for Systems Modeled at High Level of Abstraction
碩士 === 中華大學 === 資訊工程學系(所) === 95 === As system-on-chip (SoC) becomes more and more complicated, and contains a large number of transistors, the SoC could encounter the reliability problem due to the increased likelihood of faults or radiation-induced soft errors when the chip fabrication enters the...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/49022250262663973084 |