| Summary: | 碩士 === 長庚大學 === 電機工程研究所 === 95 === The coding technique of turbo codes was proposed by Berrou et al., in 1993. Since its excellent performance, the channel coding has been widely used in error control for many communication applications, such as third-generation (3G) mobile radio systems and deep space communications. A conventional (MAP) turbo decoder requires much more decoding complexity and time consumption than those decoders of other coding scheme. Recently, the soft-output Viterbi algorithm (SOVA) for decoding a code has been introduced and applied to iterative turbo decoding system. Owing to the properties of low system complexity and high decoding speed, it has been recommended to decode the turbo code for a portable radio communication system. In conventional SOVA-based turbo decoder, it has been implemented with a radix-2 trellis. The throughputs of SOVA decoders have traditionally been limited by the implementation of the radix-2 structure due to a one step recursion that processes one bit per clock cycle. In this paper, we try to explore an architecture based on radix-4 trellis SOVA decoder. The simulation results show that the proposed architecture can achieve about halved time latency for computing metrics and up to near twice times symbol throughput than that of radix-2 structure. In coding gain performance aspect, it has a slight degradation of coding gain about 0.4 dB than a conventional SOVA at 10-4 BER; nevertheless it is suitable to be applied to decode turbo codes for a mobile phone
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