Design and Implementation of Battery Voltage Balancing and Disturbing
碩士 === 國立中正大學 === 電機工程所 === 95 === This thesis proposes a battery balancing and disturbing circuit for battery bank connected in series. It can increase the capacity and cycle life of the battery bank. The proposed circuit can be operated under two different modes, balancing mode and disturbing mode...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/84309750417836268594 |
| Summary: | 碩士 === 國立中正大學 === 電機工程所 === 95 === This thesis proposes a battery balancing and disturbing circuit for battery bank connected in series. It can increase the capacity and cycle life of the battery bank. The proposed circuit can be operated under two different modes, balancing mode and disturbing mode. It will transfer electric energy from the half set of the battery bank with higher capacity to the other half set until both of them reach the same voltage potential, when the proposed circuit is operated under the battery balancing mode. On the other hand, after a certain period of resting time, the proposed circuit will charge the half set of the battery bank by discharging the other half set while operating in the disturbing mode. Hardware experimental results are used to confirm the performance of the proposed circuit.
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