The Research and Analysis of Network On-Chip with Opencore IP for System-On-Chip Design

• Main Authors: Sung-Yu Peng, 彭嵩友
• Other Authors: 李維聰
• Format: Others
• Language: zh-TW
• Published: 2006
• Online Access: http://ndltd.ncl.edu.tw/handle/87318741261061445527

碩士 === 淡江大學 === 電機工程學系碩士在職專班 === 94 === This thesis is mainly studied in the embedded system, necessary IP source comes to do an introduction. The so-called embedded system consists of SOC. System-on-chip (SoC) designs provide integrated solutions to many applications such as computer systems, multimedia, consumer electronics, etc. One of the major challenges of designing a SoC chip is the communication architecture between heterogeneous components running different frequencies and possessing different characteristics. And SOC combines some necessary functions on a chip such as CPU, RAM or LAN function. Our research purpose is to make a chip of one network system having a function to distinguish packages .The major method to get IP is to buy authorized IP. For instance, we can obtain IP of CPU from ARM, or obtain IP of LAN from TI, etc. Under this kind of method, though we can make chip simulation fast and correctly, the necessary expenses are quite high. In this page thesis, the source as IP that we have adopted is from one FREE-WEBSITE (WWW.OPENCORE.ORG ). In this website, we can obtain some FREE IP to do the application, and integrate these FREE IP to a network system chip. We use a popular language- VERILOG to build these codes. After MODELSIM compile these codes, we can simulate those waveform to make sure its function is OK.