| Summary: | 碩士 === 國立臺北科技大學 === 電腦與通訊研究所 === 94 === Dynamic voltage scaling (DVS) is one of technologies to effectively reduce energy consumption of microprocessors. In portable embedded-systems, how to reduce its power consumption is an important technique. When the system workload is light, DVS can use lower working voltage to significantly reduce the energy consumption. Therefore, this is a study topic which uses lower the working voltage to achieve the high energy efficiency. In hard real-time systems, DVS technique has the timing-constraint problem. In this thesis, we proposed DVS algorithm can be applied to fixed-priority preemptive embedded hard real-time systems. Our algorithm includes the on-line and off- line phases. In off-line phase, we proposed a new method to find out the optiomal working-speed for each task, all tasks can meet the requirement for hard real-time deadline and minimize the energy consumption of the microprocessor. In on-line phase, we precisely estimate the slack time based on an on-line algorithm, our off-line algorithm combines it to make the better efficiency by effectively arrange the slack time. Furthermore, we propose a new technique to improve the voltage transition time/energy overhead of existing algorithms. From our simulation results, our proposed algorithm can make the energy efficiency satisfactory. It can reduce the energy consumption more 40% than previous algorithms for ideal mircoprocessors.
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