| Summary: | 碩士 === 聖約翰科技大學 === 自動化及機電整合研究所 === 94 === This thesis presents the development of 5GHz wireless transceiver front-end circuits for the IEEE802.11a WLAN applications in TSMC 0.18um 1P6M CMOS technology. By using a 5.24GHz VCO, the 10MHz baseband signal is mixed and modulated up to the 5.25GHz RF signal. The system design considers the high linearity, low phase noise, and high isolation. The wireless transceiver front-end circuits of this thesis include a quadrature up-conversion mixer（QMixer） and a quadrature voltage- controlled oscillator（QVCO）. The circuit operating voltages are 1V and 1.5V, respectively.
The simulation results of QMixer show conversion gain of 6.3dB, noise figure of 11.47dB, of -16dBm, IIP3 of -6dBm, and under -40~-50dB for isolation. The magnitude difference of the 5.25GHz RF signal and the 5.23GHz image sideband signal can be up to 38 dB. The QVCO has output frequency range of 5.13GHz~5.45GHz, and the phase noise of -97.554dBc/Hz@100KHz and -119.47dBc/Hz@1MHz。
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