A Vernier-based Digital-to-time Converter
碩士 === 國立臺灣科技大學 === 電子工程系 === 94 === Digital-to-Time Converter (DTC) is an important front-end circuit of many Automatic Test Equipments（ATE）. The Digital-to-Time Converter is used to generate the stimulus for the Device Under Test（DUT）and determine when to compare the device output against the expe...
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/95zhvb |
| Summary: | 碩士 === 國立臺灣科技大學 === 電子工程系 === 94 === Digital-to-Time Converter (DTC) is an important front-end circuit of
many Automatic Test Equipments（ATE）. The Digital-to-Time Converter is
used to generate the stimulus for the Device Under Test（DUT）and determine
when to compare the device output against the expected data. In this thesis, a
novel structure called Vernier-based Digital-to-Time Converter will be
proposed.
A Vernier-based Digital-to-Time Converter is evolved directly from the
Vernier-based Time-to-Digital Converter.
The advantage of this methodology is to generate both coarse and fine
resolutions at the same time, and the fine resolution equals to the deference of
two timing periods. The DTC resolution can be made extremely fine with
merely moderate clock frequency. Also, it is easy to increase the number of
output channels on the same chip due to the simple structure adopted. It can
significantly reduce the chip size and calibration time of the conventional
versions.The circuit is designed and fabricated in a TSMC 0.35μm 2P4M
CMOS process.
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