Low Power Network-on-Chip Switch Architecture Design
碩士 === 國立臺灣大學 === 電機工程學研究所 === 94 === System-on-a-chip is a trend of modern circuit design. However, with the technology scales down, the inter-communication between IP cores becomes main challenge of SoC design. To overcome the communication problem, Network-on-Chip (NoC) is proposed to provide sca...
Main Authors: | Ju-Yueh Lee, 李儒岳 |
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Other Authors: | 賴飛羆 |
Format: | Others |
Language: | en_US |
Published: |
2006
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Online Access: | http://ndltd.ncl.edu.tw/handle/05232945265180015160 |
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