Verification Environment of High-Speed Serial Bus System
碩士 === 國立臺灣大學 === 電子工程學研究所 === 94 === As the complexity of IC designs and price to tape-out increase, verification has become a vital step in the design flow. Debugging in a large and complicated system by waveform is both time and human resource consuming. Therefore, the time to market will increas...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/00426111768008964420 |