| Summary: | 碩士 === 國立清華大學 === 資訊工程學系 === 94 === Circuit timing analysis is important in various aspects of circuit optimization. The problem of finding input vectors achieving functional and temporal requirements is known as timed Automatic Test Pattern Generation (timed ATPG). A timed ATPG algorithm will return an input vector that satisfies functional and temporal requirements simultaneously when evaluated. Several previous works use timed ATPG as a core engine for solving problems related to timing analysis, such as crosstalk and maximum instantaneous current analysis. Despite the usefulness of timed ATPG, traditional timed ATPG is slow and unscalable for large circuits. In this thesis, we present a very effective way for timed ATPG. On average, our results are 6 times faster than the most recent work, and in some cases, up to 32 times faster.
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