Summary: | 碩士 === 國立彰化師範大學 === 電子工程學系 === 94 === The internal structure of Field Programmable Gate Arrays (FPGAs) has the capability of repeatedly rewritten that can be used to construct the reconfigurable computing systems. Such systems help the designers to execute data processing tasks more rapidly and efficiently than the traditional computing systems. It not only offers designers computing efficiency in hardware, but also keeps the flexibility in software revision. However, the reconfigurable computing system, which is composed of a single FPGA, is no longer satisfactory for multi-applications. Therefore, the reconfigurable computing system composed of multiple FPGAs comes to meet the needs of intensive computing tasks.
In this thesis, the research aims to use the online configuration of software modules, with which the original developer intends for particular goals and functions, to facilitate the execution of the reconfigurable computing system by segmenting the software modules. Furthermore, those segmented software modules are allocated to specific FPGA on a Mesh computing hardware platform that consist of a set of FPGAs and several combinatorial logic blocks. Moreover, the hardware platform can be extended by a set of macro cells that are constructed by multiple FPGAs on a mesh organization. It will be easily scaling to fit into the application requirements.
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