A nano-thick layer transfer technology
碩士 === 國立中央大學 === 機械工程研究所 === 94 === As CMOS devices scale down to 90nm node or below, parasitic capacitance and low current leakage will increase. Therefore, the unique properties of silicon-on-insulator (SOI) structure are able to solve above problems, because SOI wafers consist of a layer of sing...
Main Authors: | Chao-Liang Chang, 張朝喨 |
---|---|
Other Authors: | Tien-Hsi Lee |
Format: | Others |
Language: | zh-TW |
Published: |
2006
|
Online Access: | http://ndltd.ncl.edu.tw/handle/14340458413800845957 |
Similar Items
-
Electroluminescence of Layer Thickness, Carbon Nano-particle Dopants, and Percolation Threshold Electric Conductivity of Fully Conjugated Rigid-rod Polymer
by: Chih-hao Chang, et al.
Published: (2010) -
Effect of thickness of Ag buffer layer on the nano-electrical properties of ITO film for PLED
by: Yi-Ru Li, et al. -
Effect of Thickness on The Adhesive Contact of Hyperelastic Layers
by: Chun-Fu Chang, et al.
Published: (2006) -
Optical Properties of InGaN Quantum Dots Grown on SiNx Nano Masks
by: Liang-Liang Huang, et al.
Published: (2005) -
Effect of different SnAg thickness on interfacial reactions in microbumps of Ni/SnAg/Cu
by: Chang, Chao-Chun, et al.
Published: (2011)