A nano-thick layer transfer technology
碩士 === 國立中央大學 === 機械工程研究所 === 94 === As CMOS devices scale down to 90nm node or below, parasitic capacitance and low current leakage will increase. Therefore, the unique properties of silicon-on-insulator (SOI) structure are able to solve above problems, because SOI wafers consist of a layer of sing...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2006
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Online Access: | http://ndltd.ncl.edu.tw/handle/14340458413800845957 |