| Summary: | 碩士 === 國立中央大學 === 電機工程研究所 === 94 === This thesis presents two algorithms for detecting neighborhood pattern-sensitive faults (NPSFs) for content addressable memories. The first part presents a test algorithm for binary content addressable memories (BCAMs) with NPSFs. Differ from previous works which test BCAMs with Type-2 NPSFs, the proposed test algorithms is for Type-1 NPSFs and the BCAM without inserting design-for-testability circuitry is assumed. The proposed test algorithm requires 177 1/3N+238 2/3B Read/Write/Compare operations to cover static, passive, and active NPSFs for an NxB-bit BCAM.
The second part of this thesis presents a test algorithm for ternary content addressable memories (TCAMs) with NPSFs. Testing NPSFs in TCAMs is more difficult than that in BCAMs due to the special TCAM cell structure. The proposed test algorithm can cover static, passive, and active Type-1 NPSFs by using constrained two-group methodology. The test algorithm requires 288N Read/Write operations to cover the defined NPSF.
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