| Summary: | 博士 === 國立交通大學 === 電子工程系所 === 94 === In this thesis we propose Orthogonal Frequency Division Multiplexing (OFDM)-based baseband transceivers comprising the low-complexity synchronizer and channel equalizer schemes. In the 54Mb/s Wireless Local Area Network (WLAN), the existing OFDM baseband chips consumes > 200mW power, which occupies > 35% power of existing Physical Layer (PHY) system. When the system migrates to 480Mb/s Ultra-Wide Band (UWB), the baseband power will furthermore grow following the raised circuit speeds. Hence the low-power design becomes the key technique of a high-speed baseband transceiver. In OFDM transceiver, the synchronizer and channel equalizer require high hardware complexity to acquire signal offsets between transmitter and receiver and to solve the wireless channel fading, therefore occupying > ~75% gate-count and power of OFDM design. Hence the low-complexity synchronizer and channel equalizer schemes are focused in our research work.
In this paper, first we propose a synchronizer comprising high-power-signal-used auto-correlator (AC) and high-power-coefficient matched filter (MF) for OFDM-based WLAN system. Different from the existing synchronization algorithm, the proposed synchronizer only uses partial high-power signal and coefficients therefore reducing the amount of used signal and computations. Hence the multiplication amount and register size can be efficiently reduced. Equivalent to 16.3% of complex multiplications (equal to 3160) of the WLAN OFDM baseband transceiver can be reduced. For reducing the increased SNR for 10% PER increased by multipath channel and solving the time-variant channel caused by the Doppler effect with low cost, we employ a frequency-domain minimum mean-square-error channel equalization (FD-MMSE EQ) and propose a decision-directed channel tracking (DDCT). The employed FD-MMSE EQ can efficiently reduce the SNR loss caused by conventional direct-division equalization scheme. The proposed DDCT comprising only 2 complex multipliers is used to track the channel variance. In the indoor multipath channel with Doppler effect the proposed DDCT can reduce the mean-square-error of channel estimation by 5dB~15dB.
For 480Mb/s OFDM-based UWB, we proposed a synchronizer comprising sub-sampling-based AC and moving-average-free MF. The proposed synchronizer not only needs fewer multiplications but also needs lower hard�蓹are cost. A general synchronizer needs 4-parallelsim to achieve 528Msamples/s throughput rate with 132MHz clock rate. The proposed synchronizer only needs 1-parallelsim and 1/4 of computations therefore needing 37.6% gate count and 43.3% power of the general synchronizer. Then we propose a divider-and-multiplier-free channel equalizer where the original complex divider and multipliers are completely replaced by adders and subtractions. It only needs 48.6% gate count and 40.4% power of a general OFDM channel equalizer, and the added SNR loss for typical 8% packet error rate is only 0.3dB.
The baseband transceivers comprising the proposed low-complexity designs are implemented for OFDM-based WLAN, low-density-parity-check (LDPC)-COFDM-based UWB, and multi-band (MB)-OFDM-based UWB systems with 0.18�慆 and 0.13�慆 CMOS process. They can achieve 6~480Mb/s high data rates and better 6.45~9.7dB SNR than system performance requirements. The power of the proposed OFDM transceiver for 54Mb/s WLAN is 68mW in 0.18�慆 CMOS process. And the power of the proposed OFDM transceivers for 480Mb/s UWB is 162mW in 0.18�慆 CMOS and 31.2mW in 0.13�慆 CMOS process. The proposed low-complexity synchronizer and equalizer can reduce 45.3% gate-count and 65.1% power of the UWB OFDM transceiver.
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