| Summary: | 博士 === 國立交通大學 === 材料科學與工程系所 === 94 === A metal-induced crystallization method can be used to decrease the crystallization temperature of amorphous silicon (a-Si). Pd and Ni are in widespread use. The metal layer was generally deposited by traditional Physical Vapor deposition (PVD) method. However, the metal layer deposited by PVD method was a time-consuming and high equipment cost process. In order to solve above problems, Pd metal was deposited on a-Si by an electroless plating method was proposed. The electroless plating method include the simple and convenient merits. In this study, electroless Pd plating induced crystallization of amorphous silicon (a-Si) thin films has been proposed for fabricating low temperature polycrystalline silicon thin film transistors (LTPS TFTs). However, the current crystallization process often leads to poor device performance due to the large amount of Pd silicide residues in the poly-Si thin films. It was found that the amount of Pd silicide increased with annealing time and temperature. In this study, a two-step annealing process was developed to obtain the appropriate amount of Pd silicide for inducing the crystallization of a-Si. The device characteristics were significantly improved by this two-step process.
Effects of oxygen on the growth of metal (Ni) induced lateral crystallization (NILC) of amorphous silicon have been investigated. It is found that the oxygen in the annealing ambient did not degrade the MILC length or growth rate. The oxygen existence in Ni film does not degrade the MILC growth rate either. However, it retards the nucleation of poly-Si for about 4 h. This is because that NiO needed an incubation period to be reduced to nickel metal for the subsequent mediated crystallization of a-Si process.
In order to further improve the crystalline quality of poly-Si and the performance of LTPS TFT, the hybrid processes are proposed. The hybrid processes are to combine the NILC and ELA process to produce high quality and large grain. The growth mechanism of a hybrid processes to crystallize amorphous silicon (a-Si) film was studied . In the process, a-Si was first converted to polycrystalline silicon (poly-Si) using Ni-metal-induced lateral crystallization (NILC), and then annealed with excimer laser (ELA). Two crystallization mechanisms were found on these NILC-ELA films: (A) a-Si melting, and (B) a-Si/poly-Si melting region. In a-Si melting region, the sizes and the shapes of the needle Si grains were similar to those of NILC poly-Si. In a-Si/poly-Si melting region, the shapes and sizes of poly-Si grains were quite different from those of NILC needlelike grains. Two crystallization regimes were found in a-Si/poly-Si melting region: (1) geometrical coalescence regime and (2) complete melting regime. In the geometrical coalescence regime, the width of grains dramatically increased to 600nm due to the geometrical coalescence of Si needle grains. However, in the complete melting regime, the NILC Si films melted completely. Small poly-Si grains were formed by homogeneous nucleation and growth. The compare of the characteristic of the TFT devices are also discussion in this study. It’s found the grain in the geometrical coalescence regime have the better characteristic of TFT.
Recently, high performance thin film transistors (TFTs) on plastic substrate have been studied. Plastic display which have advantages of lighter weight, small thickness, high shock-resistant and good flexibility have much potential for replacements conventional display on glass. However, it’s the difficult process to fabricate the high performance TFT on the plastic substrate. The heat-resistant of plastic substrate is much lowest. Therefore, the transfer technology develop was needed. In this study, the once and double transfer technology was used to fabricate the high performance TFTs on plastic substrates.
Finally, TWO-STEP Ni-induced crystallization of amorphous silicon (Si) using a Si wafer as a filter was proposed for the first time. In the first step, sample stacks were preannealed at 500 for 2h to produce appropriate amounts of silicides and polycrystalline Si. The Si wafer filter was then removed and annealed at 550 for 12h. It was found that the average grain size was about 30μm. The grain was composed of parallel needle-like sub-grains that grew in <111> directions.
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