| Summary: | 碩士 === 國立成功大學 === 電機工程學系碩博士班 === 94 === This thesis is mainly divided into two topics. The first topic deals with the characterization of a newly proposed on-chip switchable inductor on silicon substrate. The simulation, measurement and modeling results of proposed switchable inductor are described. The second topic deals with the design of a quadrature VCO using our proposed switchable inductor for the UWB MB-OFDM synthesizer application.
In this thesis, the general characteristics of on-chip inductors are discussed. We proposed a newly switchable differential inductor that can be achieved over 50 % area shrinkage as compared with the traditional switchable inductor. Finally the simulation method and procedures in ADS-Momentum will be introduced.
The proposed switchable inductors are fabricated by TSMC 0.18 μm 1P6M standard RF CMOS technology. In order to fit results between simulation and measurement the well calibrated process parameters will be used in electromagnetic simulation tool. The characteristics of proposed switchable inductors with different geometry and switch MOS size are also observed. A simple inductor lumped-circuit model is also proposed in order to describe the high-frequency behavior of inductor. Such circuit model is with a relatively reasonable accuracy up to 10 GHz. Finally the simulation, measurement, and modeling results are compared.
The VCO for multi-band or wide tuning range applications will be demonstrated by using our proposed switchable inductor. Based on a new frequency plan, we have proposed a new RF synthesizer architecture for UWB MB-OFDM system. A quadrature VCO that can operate at 6,072 / 6,600 MHz by using the switchable inductor is designed for such synthesizer. The simulation results of QVCO shows that the oscillation frequency can operate at 6,072 MHz or 6,600 MHz. At 1.8 V power supply voltage the QVCO core draws 8.733 mA and a total power consumption of QVCO core circuit is 15.72 mW. The simulated phase noise at 1 MHz offset from the center frequency (6.136 GHz) is -115 dBc/Hz when switch MOS turns OFF. The simulated phase noise at 1 MHz offset from the center frequency (6.622 GHz) is -114 dBc/Hz when switch MOS turns ON. The tuning frequency range is from 5,858 MHz to 6,437 MHz and 6,436 MHz to 7,018 MHz through MOS varactor and switchable capacitor array when switch MOS turns OFF and ON respectively. Finally, the QVCO with integrating our proposed switchable inductor is also fabricated by TSMC 0.18 μm 1P6M standard CMOS technology
The original contributions of thesis are：The first, we propose a new switchable inductor architecture that can shrink the area about 50 % thus cost down. The second, the proposed inductors can be integrated into a VCO circuit to provide the multi-band / multi-standard or the wide tuning range application. The third, we propose a new frequency plan as well as the circuit architecture for an UWB MB-OFDM synthesizer. Such synthesizer can provide the complete mode-1 / mode-2 operation and achieve the target of low power consumption.
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