The design of low power decimation filter chip for Sigma-Delta converter

碩士 === 國立成功大學 === 電機工程學系碩博士班 === 94 === In the study, we would like to realize an efficient and low power consuming Sigma Delta A/D converters (SDADCs). For the reason we need to improve the digital filter part is that mostly area required and power consumed part we have known for decades. As long a...

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Bibliographic Details
Main Authors: Wei-Tang Su, 蘇偉棠
Other Authors: Ching-Hsing Luo
Format: Others
Language:zh-TW
Published: 2006
Online Access:http://ndltd.ncl.edu.tw/handle/47789971396863271581