Monolithic DCFL Integration Using Enhancement-/ Depletion-mode Double δ-Doped AlGaAs/InGaAs pHEMTs

• Main Authors: Ming-Feng Huang, 黃明風
• Other Authors: Wei-Chou Hsu
• Format: Others
• Language: en_US
• Published: 2006
• Online Access: http://ndltd.ncl.edu.tw/handle/71443903172996341149

碩士 === 國立成功大學 === 微電子工程研究所碩博士班 === 94 === Abstract In this work, we fabricated enhancement-/depletion-mode by a developed citric etchant. The etchant near room temperature(23℃) possesses a high GaAs/AlGaAs etching selectivity applied to an etched stop surface. Since it is expected that control Schottky thinner more accurate, we have successfully realized the E-mode and D-mode on the same chip. We use double δ-doped carrier supply layer to enhance two-dimensional electron gas (2DEG) concentration and increase the current driver capability. It is desirable to be able to sustain high extrinsic transconductance (gm=221/191 mA/mm) and large voltage swing (GVS=1.23/0.55) for the D-mode (E-mode) device, respectively. We employ an AlGaAs/GaAs superlattice as a barrier layer against impurity contamination to improve the high-temperature performances. This structure provides isolation of the device from carriers thermally generated in the substrate. The experimental results show lower saturation output conductance (gd=0.84/0.63 mS/mm), good saturation and pinch-off characteristics. The enhancement-mode (E-mode) and depletion-mode (D-mode) device operation on the same chip and their monolithic integration to form a DCFL inverter by using the double δ-doped AlGaAs/InGaAs pseudomorphic high electron-mobility transistors have been successfully fabricated and investigated. Upon the identical layer structure design, the proposed pHEMT demonstrates different operation modes with distinguished static, microwave-frequency (ft=21.2/12.5 GHz and fmax=30.5/25.5 GHz), and output power characteristics (Pout=15.3/13.5 dBm and P.A.E. =52.7/41.6% at 2.4GHz). In addition, the transfer characteristics, power dissipations, and the noise margins (NMH=0.266V, NML=0.168V at VDD = 1V T=300K) of the monolithic DCFL inverter have also been studied. The noise margins are superiorly maintained above 0.1 V as the ambient temperature increases up to 400K. The present devices are promisingly suitable for the low-power-dissipation, high-temperature digital circuit or the mixed-mode circuit applications.