Part 1: Effect of Pre-Gate Oxide Clean Water Temperature on The Performances of Deep-submicron CMOSPart 2: Impact of Silicide Technologies on The Integrity of Thin Gate Oxide Film Dielectric
碩士 === 國立成功大學 === 微電子工程研究所碩博士班 === 94 === Part 1 Effect of silicon surface micro-roughness and stress caused by hot DI water rinse on the electrical properties of deep-submicron CMOS transistors and MOS capacitors such as threshold voltage, saturation current, leakage current and breakdown voltage (...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/57980954762570742140 |