Frequent Opcode Encoding for Low Power Instruction Cache

碩士 === 國立中興大學 === 資訊科學系所 === 94 === In this paper we introduce a low-power instruction cache memories (I-Cache), which exploits the prevalence of “hot instruction” stored in the I-Cache. In order to reduce static and dynamic power, we also take advantage of the hot instruction to cut off supply volt...

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Bibliographic Details
Main Authors: Po-Yu Lai, 賴柏宇
Other Authors: Yen-Jen Chang
Format: Others
Language:zh-TW
Published: 2006
Online Access:http://ndltd.ncl.edu.tw/handle/56523188089635002258