Performance Analysis and Enhancement for a Parallel Packet Switching System
博士 === 國立中興大學 === 資訊科學系所 === 94 === Under situations of the same buffer resources deployed in the switch, shared-memory based packet switches compared with other memory managements are known to deliver the best possible performance for bursty data traffic in networks and Internets. Nevertheless, sca...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2006
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/02816888170175623325 |