Design and Analysis of A Charge Transfer Current Latched Sense Amplifier Circuit for SRAM
碩士 === 義守大學 === 電子工程學系碩士班 === 94 === Large bit line wire loading is one of the main bottlenecks to the performance of SRAM. We propose a charge-transfer mechanism and a new pre-charge scheme to improve the sensing speed of the traditional current latch sense amplifier. The improvement of sensing spe...
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2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/74187884365545419376 |
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ndltd-TW-094ISU054280202015-10-13T14:49:54Z http://ndltd.ncl.edu.tw/handle/74187884365545419376 Design and Analysis of A Charge Transfer Current Latched Sense Amplifier Circuit for SRAM 靜態隨機存取記憶體之電荷傳輸電流栓鎖感應放大器線路的分析與設計 Yu-shu Tsai 蔡毓恕 碩士 義守大學 電子工程學系碩士班 94 Large bit line wire loading is one of the main bottlenecks to the performance of SRAM. We propose a charge-transfer mechanism and a new pre-charge scheme to improve the sensing speed of the traditional current latch sense amplifier. The improvement of sensing speed of the proposed design is about 4% comparing to the traditional current latch sense amplifier. In addition, the proposed design has much better tolerance and faster sensing speed on Vt mismatch of NMOS transistors. The presented circuit simulation result is evaluated in the TSMC 0.18μm Mixed Signal/RF Process Model. Ying-Wei Jan 簡映偉 2006 學位論文 ; thesis 49 en_US |
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NDLTD |
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en_US |
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Others
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NDLTD |
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碩士 === 義守大學 === 電子工程學系碩士班 === 94 === Large bit line wire loading is one of the main bottlenecks to the performance of SRAM. We propose a charge-transfer mechanism and a new pre-charge scheme to improve the sensing speed of the traditional current latch sense amplifier. The improvement of sensing speed of the proposed design is about 4% comparing to the traditional current latch sense amplifier. In addition, the proposed design has much better tolerance and faster sensing speed on Vt mismatch of NMOS transistors. The presented circuit simulation result is evaluated in the TSMC 0.18μm Mixed Signal/RF Process Model.
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| author2 |
Ying-Wei Jan |
| author_facet |
Ying-Wei Jan Yu-shu Tsai 蔡毓恕 |
| author |
Yu-shu Tsai 蔡毓恕 |
| spellingShingle |
Yu-shu Tsai 蔡毓恕 Design and Analysis of A Charge Transfer Current Latched Sense Amplifier Circuit for SRAM |
| author_sort |
Yu-shu Tsai |
| title |
Design and Analysis of A Charge Transfer Current Latched Sense Amplifier Circuit for SRAM |
| title_short |
Design and Analysis of A Charge Transfer Current Latched Sense Amplifier Circuit for SRAM |
| title_full |
Design and Analysis of A Charge Transfer Current Latched Sense Amplifier Circuit for SRAM |
| title_fullStr |
Design and Analysis of A Charge Transfer Current Latched Sense Amplifier Circuit for SRAM |
| title_full_unstemmed |
Design and Analysis of A Charge Transfer Current Latched Sense Amplifier Circuit for SRAM |
| title_sort |
design and analysis of a charge transfer current latched sense amplifier circuit for sram |
| publishDate |
2006 |
| url |
http://ndltd.ncl.edu.tw/handle/74187884365545419376 |
| work_keys_str_mv |
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