PCI Bus Coding For Power Stability

• Main Authors: Chin-te Chang, 張欽德
• Other Authors: Shih-Yi Yuan
• Format: Others
• Language: zh-TW
• Published: 2006
• Online Access: http://ndltd.ncl.edu.tw/handle/78877967992986633151

碩士 === 逢甲大學 === 通訊工程所 === 94 === Nowadays, PCI (Peripheral Component Interconnect) bus is the key I/O bus interface of PC (personal computer) which is responsible for transferring a large amount data. Thus, power stability of PCI significantly affects the correctness of data transmission. In this thesis, by Coding the signal passing through PCI, the stability of power signal in PCI bus can be increased. The BI Coding is adopted so as to reduce signal activities and thus, the power noise of PCI power line is decreased as well. Herein, a testing PCI interface card has been fabricated. According to the specification of PCI bus, a PCI target chip is designed by means of FPGA. Afterward, connecting this PCI card and a PC, a signal measurement system for PCI is built. Eventually, we design different transmission data and capture the measured signal. The measurement result and discussion have been presented as well.