| Summary: | 碩士 === 逢甲大學 === 通訊工程所 === 94 === Recently, the ultra wide-band (UWB) technology has been opened up in the spectrum from 3.1 to 10.6 GHz by the U.S.A Federal Communication Commission (FCC). The purpose of the thesis is aiming at the design and analyses of the ultra wideband low noise amplifier for IEEE 802.15.3a 3.1 – 10.6 GHz band. Therefore, this thesis deals with the UWB radio receiver which is the UWB low noise amplifier (LNA). We know the low noise amplifier (LNA) is the first module in the receiving path of a transceiver, which affects the performance of signal bandwidth, noise figure, and power dissipation of the entire system. Several CMOS LNA design techniques had been reported for broadband communication applications. The well-developed distributed amplifier is known as its wide bandwidth. However, it requires several area consuming inductors to perform signal delay so we must try to reduce the chip size and power consumption.
The proposed UWB LNA was implemented based on TSMC standard 0.18 um RF CMOS process. From the design flow, circuit simulation, layout of circuit, and measurement of chip have been described completely. In a fully integrated 3.1 – 8 GHz UWB LNA structures, we employ Chebyshev band-pass filter circuit and combine shunt-feedback circuit to achieve wideband input impedance matching. In addition, the gain stage amplifier adopts cascode structure to implement amplifier stage. The measured input return loss (S11) is less than -10 dB over 3 – 8 GHz range. The maximum power gain (S21) is 9.1 dB and the -3 dB bandwidth covers 2 – 9 GHz. The 1 dB gain compression performance is approximate -4 dBm. The bias current is 12 mA from a 1.8 V and the power dissipation is 21.6 mW. Although there are some different between measured results and simulation data, after finding the reason and embed in the simulation, the circuit performance still be maintained well.
The last circuit is modified structure of a fully integrated 3.1 – 8 GHz UWB LNA which operating frequency is from 3.1 GHz to 10.6 GHz and the performance can achieve good input/output wideband matching, high linearity, and excellent wide operating bandwidth. Additionally, the gain flatness can be maintained within 1 dB in the whole operating bandwidth. A fully integrated 3.1 – 10.6 GHz UWB LNA consists of RC shunt-feedback circuit, the modified band-pass Chebyshev filter circuit, and the inter-stage gain amplifier. The measured results show that adjusting the values of Rf and Cf, the input return loss (S11) less than -10 dB. The maximum power gain 8.5 dB and 8 dB within the 3 dB bandwidth from 2.1 – 5.8 GHz and 6.9 – 10.1 GHz can be obtained at the operation condition of VDD = 1.8 V. The bias current is 13.8 mA and the power dissipation is 24.8 mW.
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