Feasible Assignment of Optimized Power Pads for Signal Intergrity in Modern SOC Design

碩士 === 中華大學 === 資訊工程學系(所) === 94 === Based on the topology of hierarchical power quad-grids, an optimal network analysis method is proposed to accurately find the voltage of the reference nodes and the current of all the reference branches. After calculating out the number value, IR-drop voltage con...

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Main Author: 柯俊育
Other Authors: 顏金泰
Format: Others
Language:zh-TW
Published: 2006
Online Access:http://ndltd.ncl.edu.tw/handle/29651518613871462537
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spelling ndltd-TW-094CHPI03920412016-06-01T04:14:45Z http://ndltd.ncl.edu.tw/handle/29651518613871462537 Feasible Assignment of Optimized Power Pads for Signal Intergrity in Modern SOC Design 現代系統晶片設計考量訊號完整性之最優化電源腳位設定 柯俊育 碩士 中華大學 資訊工程學系(所) 94 Based on the topology of hierarchical power quad-grids, an optimal network analysis method is proposed to accurately find the voltage of the reference nodes and the current of all the reference branches. After calculating out the number value, IR-drop voltage constraints emerging to the network, utilize the basic effect of circuit, put forward a kind of simple method, and the formula simple to use. Feasible assignment and the optimized number inserting of power pads moved with power pads reduce the question of interfering, and then reduce unnecessary decoupling capacitance inserting, keep signal integrity and guarantees function of chip is comp1ete. For the power pad assignment for the topology of hierarchical power quad-grids, the experimental results show that the iterative adjustment approach with optimal network analysis inserts and assigns the optimized power pads onto feasible locations to release all the IR-drop constraints in reasonable CPU time for the tested example. 顏金泰 2006 學位論文 ; thesis 57 zh-TW
collection NDLTD
language zh-TW
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sources NDLTD
description 碩士 === 中華大學 === 資訊工程學系(所) === 94 === Based on the topology of hierarchical power quad-grids, an optimal network analysis method is proposed to accurately find the voltage of the reference nodes and the current of all the reference branches. After calculating out the number value, IR-drop voltage constraints emerging to the network, utilize the basic effect of circuit, put forward a kind of simple method, and the formula simple to use. Feasible assignment and the optimized number inserting of power pads moved with power pads reduce the question of interfering, and then reduce unnecessary decoupling capacitance inserting, keep signal integrity and guarantees function of chip is comp1ete. For the power pad assignment for the topology of hierarchical power quad-grids, the experimental results show that the iterative adjustment approach with optimal network analysis inserts and assigns the optimized power pads onto feasible locations to release all the IR-drop constraints in reasonable CPU time for the tested example.
author2 顏金泰
author_facet 顏金泰
柯俊育
author 柯俊育
spellingShingle 柯俊育
Feasible Assignment of Optimized Power Pads for Signal Intergrity in Modern SOC Design
author_sort 柯俊育
title Feasible Assignment of Optimized Power Pads for Signal Intergrity in Modern SOC Design
title_short Feasible Assignment of Optimized Power Pads for Signal Intergrity in Modern SOC Design
title_full Feasible Assignment of Optimized Power Pads for Signal Intergrity in Modern SOC Design
title_fullStr Feasible Assignment of Optimized Power Pads for Signal Intergrity in Modern SOC Design
title_full_unstemmed Feasible Assignment of Optimized Power Pads for Signal Intergrity in Modern SOC Design
title_sort feasible assignment of optimized power pads for signal intergrity in modern soc design
publishDate 2006
url http://ndltd.ncl.edu.tw/handle/29651518613871462537
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