Study on Poly-Ge and Ge nano dot Nonvolatil Memory Devices

• Main Authors: Huang cheng-sheng, 黃承生
• Other Authors: 賴朝松
• Format: Others
• Language: zh-TW
• Published: 2006
• Online Access: http://ndltd.ncl.edu.tw/handle/78647455765973010626

碩士 === 長庚大學 === 電子工程研究所 === 94 === Nowadays the portable electronic devices demand the nonvolatile memory that is lower power consumption, high density, faster read and write speed, and longer memory period. In addition, after times of read and write, the read voltage and write voltage cannot be changed. We know that the low power consumption and faster read and write speed is depend on the thickness of the tunneling oxide, the super thin tunneling oxide can form tunneling current effect; this effect can speed up the read and write speed of the electrical charges. In the meanwhile, in order to economize power consumption the tunneling current effect must be present under low voltage; thus, the thickness of the tunneling oxide must be smaller than 35A. The nonvolatile memory uses tunneling current to read and write, the damage on the tunneling oxide material can be reduced to the smallest (the electrons directly pass through tunneling oxide and not damaging the structure of tunneling oxide material), so the durability of the memory increases. Yet under static voltage, the excessively thin tunneling oxide will form direct tunneling current and causes charge leakage, so the data retention time of the nonvolatile memory decreases. Therefore, the poly-Si floating Gate is useless under excessively thin tunneling oxide. Recently, the nano-crystal storage is brought out; its electrical charge is stored separated in the quantum dots that is covered by the insulator. As the result, the charge leakage is reduced and data retention time is increased. This makes the super thin tunneling oxide possible to apply on nonvolatile memory [1][2][3]. However, the high-density memory Ge nanodots and large memory window voltage have manufacturing technique difficulty in Ge quantum dots. The quantum dots evenness and effective rate is also questionable; thus, we brought out the poly-Ge floating Gate that is super thin and have quantum well effect. It can store electrical charge in high density, and it is easier on manufacture; also, it is uniform and its effective rate is high. In the experiment we discovered that Poly-Ge floating Gat has very high memory window, the possible reason is that Ge has better negative electrical polarity Ge (2.1)>Si(1.9), this means that poly-Ge might have better ability in store electrical charge than poly-Si and the memory window that is larger than quantum dots. Thus it can solve the problem of data retention time being too short with over-thin tunneling oxide. First of all, we have successfully produced three MOS structures of floating-gate. The first one is Poly-Ge floating-gate. C-V measurement finds that it has a very good hysteresis loop. Its hysteresis width exceeds 12.6V. The second one is Cracked Poly-Ge floating-gate. C-V measurement finds that its hysteresis width exceeds 4V. The third one is the Ge quantum dots structure. Although we have successfully produced Ge quantum dots, its structure is not perfect for the limitation of time. Therefore, it’s memoryless. It also proves that producing Ge quantum dots by new technology is possible. Poly-Ge produced by us is packaged in the high-quality SiO2, which is deposition of a-Si after oxidation in high temperature by LPCVD. The principle is using dry oxidized SiGe film under high temperature to agglomerate Poly-Ge and Ge quantum dots packaged in the SiO2 from Ge. Currently in foreign journals, published Ge quantum dots’ control oxide is sputtered SiO2 or TEOS with low insulating quality. We adopt the LPCVD in the deposition of a-Si using Si2H6 and produce high quality control oxide under a high temperature of 950C. This is good for the rate of excellent for NVRAM based on Ge quantum dots.