Three Dimensional Wavelet Based Video Codec System and Its Hardware Implementation

• Main Authors: li-chun liang, 梁立群
• Other Authors: none
• Format: Others
• Language: zh-TW
• Published: 2005
• Online Access: http://ndltd.ncl.edu.tw/handle/87557298840382770593

碩士 === 國立雲林科技大學 === 電子與資訊工程研究所 === 93 === In this thesis, we investigate a 3D-DWT based video codec system; In the transformation, since the correlation along temporal domain is larger than that in the spatial domain, asymmetric decomposition has been proved to be more efficient than symmetric decomposition is in data compression；In zero tree coding, various algorithms have been developed in the past, e.g. EZW、SPIHT…. For these algorithms, our simulation show that asymmetric tree structures are more efficient symmetric ones; However, for the proposed shape adaptive zero tree coding algorithms, symmetric tree structure are more efficient than the asymmetric ones; In this thesis, we conduct extensive simulations of algorithm on the compression efficiency of various combinations of wavelet decomposition and coding schemes. In hardware implementation, we implement 2D system first; then extend it to 3D system. finally, we implement the entire system in FPGA Board, and we use CMOS and VGA display as the system input and output. Compression ratio was 5~20. The resolution is 320x240, and the system can process 5~7 frames per second.