Hardware-Software Partitioning Using Multiple Algorithms for FPGA Systems

碩士 === 國立臺北科技大學 === 電腦與通訊研究所 === 93 === Traditionally, the design of hardware and software parts in a system is processed independently, and the issues of hardware-software(HW-SW) partitioning almost decides by the experiences of designers. As the result, the design framework usually shows the error...

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Bibliographic Details
Main Authors: Jen-Pu Tseng, 曾仁溥
Other Authors: Trong-Yen Lee
Format: Others
Language:zh-TW
Published: 2005
Online Access:http://ndltd.ncl.edu.tw/handle/84s464
Description
Summary:碩士 === 國立臺北科技大學 === 電腦與通訊研究所 === 93 === Traditionally, the design of hardware and software parts in a system is processed independently, and the issues of hardware-software(HW-SW) partitioning almost decides by the experiences of designers. As the result, the design framework usually shows the errors and mismatch in the last stage after software and hardware had already been carried out. For this reason, it is difficult to turn the design to improve its performance and achievement. Due to those disadvantages of traditional design methodology, the HW-SW codesign is becoming a novel and practical solution to modern system design research area. The HW-SW partitioning is an important step in HW-SW codesign. Therefore, we propose a partitioning tool using genetic algorithm, simulated annealing algorithm and global enumerated search algorithm to implement in the system partitioning. We develop a friendly GUI (Graphic User Interface) for user in the partitioning tool. Finally, we use two design examples, Edge-Detection and JPEG design in digital image processing, to demonstrate the feasibility of our proposed hardware-software partitioning tool on the Xilinx FPGA system platform.