Coverage directed testbench generation for still image CODEC IP''s
碩士 === 國立臺灣大學 === 電子工程學研究所 === 93 === Verification has become the bottleneck in the hardware design process, and one of the hardest verification problems is to verify the correctness of the RTL code. In this paper, a testbench configuration to obtain high toggle coverage for still CODEC image IP...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2005
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| Online Access: | http://ndltd.ncl.edu.tw/handle/52160944678114424843 |