Design and Implementation of an Oversampling Delta-Sigma Modulator

• Main Authors: Chi-Hsin Wang, 王啟欣
• Other Authors: Sao-Jie Chen
• Format: Others
• Language: en_US
• Published: 2005
• Online Access: http://ndltd.ncl.edu.tw/handle/10564689381133888102

碩士 === 國立臺灣大學 === 電子工程學研究所 === 93 === In this Thesis, we designed and implemented an oversampling multi-bit delta-sigma modulator. Multi-bit delta-sigma modulator uses an internal DAC to provide the feedback signal. However, elements mismatch in DAC due to process variation will results in non-linear distortion and cannot be noise shaped by the delta-sigma modulation loop, this will degrade the performance of a delta-sigma modulator very much. In order to reduce the mismatch error of DAC, many dynamic element matching (DEM) algorithms have been proposed. Compared with other algorithms, the data weighting averaging (DWA) technique is used in our design due to it has the advantage of fast error cancellation and easy circuit implementation. We use TSMC 0.18um 1P6M process and mixed-signal design methodology for our work. The designed modulator presents a 24 kHz signal bandwidth and can be used in audio application.