The Design and Implementation of 5-bit 10Gb/s Track-and-Hold Circuit
碩士 === 國立臺灣大學 === 電子工程學研究所 === 93 === In CMOS circuits, a high-speed track-and-hold circuit is a fundamental and indispensable component in an A/D converter. The track-and-hold amplifier can be classified as the open-loop and the closed-loop architectures. The closed-loop architecture has the charac...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2005
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/94992128648319549864 |
| Summary: | 碩士 === 國立臺灣大學 === 電子工程學研究所 === 93 === In CMOS circuits, a high-speed track-and-hold circuit is a fundamental and indispensable component in an A/D converter. The track-and-hold amplifier can be classified as the open-loop and the closed-loop architectures. The closed-loop architecture has the characteristic of higher resolution and lower speed. On the contrary, the open-loop architecture has the characteristic of lower resolution and higher speed. Consequently, different kinds of track-and-hold circuits will be needed based on the purpose of the applications. Now no architecture can have both the advantages at the same time.
In this thesis, a 5-bit 10Gb/s track-and-hold circuit has been designed and implemented in a standard 0.18-um CMOS process. It utilizes the high frequency characteristic of MOS transistors to reduce the nonlinearity due to the effect of high-frequency and raise the resolution under high-frequency operation.
|
|---|