Cache Leakage Management for Multi-Programming Workloads

碩士 === 國立臺灣大學 === 資訊工程學研究所 === 93 === Power consumption is becoming a critical design issue of embedded systems due to the popularity of portable device such as cellular phones and personal digital assistants. While the bulk of the power dissipated is dynamic switching power, leakage power is also b...

Full description

Bibliographic Details
Main Authors: Chun-Yang Chen, 陳俊揚
Other Authors: Chia-Lin Yang
Format: Others
Language:en_US
Published: 2005
Online Access:http://ndltd.ncl.edu.tw/handle/90811839753753383486
Description
Summary:碩士 === 國立臺灣大學 === 資訊工程學研究所 === 93 === Power consumption is becoming a critical design issue of embedded systems due to the popularity of portable device such as cellular phones and personal digital assistants. While the bulk of the power dissipated is dynamic switching power, leakage power is also beginning to be a concern. Leakage is projected to account for 70% of the cache power budget in 70nm technology. In recent year, two kinds of circuit technique are presented for reducing leakage consumption in cache cells: state-destructive and state-preserving. Most leakage energy can be reduced by using effective control to switch leakage mode. Previous works on cache leakage management are all based on single-application behavior. In real workloads, caches are actually shared by multiple processes. In this paper, I utilize the task-level information to manage cache leakage power. I partition the caches among tasks according to their working set size. I then apply different leakage management policies to the cache regions allocated to active and suspended tasks, respectively. My proposed policies effectively reduce L1 cache leakage energy by 84% on the average for the multi-programming workloads with only negligible degradations in performances.