Jitter Performance Study For Phase-Lock Loop

Jitter Performance Study For Phase-Lock Loop

碩士 === 國立清華大學 === 電機工程學系 === 93 === In many circuits, PLL must provide an output clock to follow the input clock closely. Examples of applications that use PLL include clock and data recovery, clock synthesis, and synchronization, frequency synthesis and PLL modulator or de-modulator application. As...

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Bibliographic Details
Main Authors:	Yu-Chen Chiang, 江宇晟
Other Authors:	Po-Chiun Huang
Format:	Others
Language:	zh-TW
Published:	2005
Online Access:	http://ndltd.ncl.edu.tw/handle/70476321354403064487

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