Accurate RTL Power Estimation Linked with Standard Cell Power Characterization

• Main Authors: Kai-Shuang Chang, 張凱翔
• Other Authors: Shi-Yu Huang
• Format: Others
• Language: en_US
• Published: 2005
• Online Access: http://ndltd.ncl.edu.tw/handle/43895901615186789044

碩士 === 國立清華大學 === 電機工程學系 === 93 === We investigate in the thesis the cell-based power characterization and its linkage to an RTL (Register Transfer Level) power estimation flow for CMOS logic circuits. The proposed power characterization method is highly accurate because of taking into account the effects of glitches, output loading, and logic state transition in registers. For each combinational cell, we build the power models for full swings as well as for partial swings. For flip-flop cells, we propose a split model that treats the input stage and output stage separately to increase its accuracy. Experimental results on a number of real-life test cases show that the estimation error can be kept within 2% error on the average as compared to that obtained by pure Nanosim simulation.