Performance Evaluation of Application-Specific RISC Processor Improvements
碩士 === 國立清華大學 === 資訊工程學系 === 93 === The RISC architecture is a load-store architecture that its data processing operations execute only on registers. When the programmer executes the computational operations, the processed data must be loaded from memory to registers and calculated. After completing...
Main Authors: | Chang-Hung Yang, 楊長泓 |
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Other Authors: | Chin-Yu Huang |
Format: | Others |
Language: | en_US |
Published: |
2005
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Online Access: | http://ndltd.ncl.edu.tw/handle/90316049793839666708 |
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