A Spread Spectrum Clock Generator for Serial-ATA

碩士 === 國立交通大學 === 電機與控制工程系所 === 93 === As the increasing demand for high data transmitting rate, Serial AT Attachment (Serial-ATA) is one of the popular external storage specifications. As operating at high frequencies, currents and voltages present in the circuits and the signal traces lead to grea...

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Bibliographic Details
Main Authors: Wei-Ta Chen, 陳緯達
Other Authors: Chau-Chin Su
Format: Others
Language:en_US
Published: 2005
Online Access:http://ndltd.ncl.edu.tw/handle/34xz8e
Description
Summary:碩士 === 國立交通大學 === 電機與控制工程系所 === 93 === As the increasing demand for high data transmitting rate, Serial AT Attachment (Serial-ATA) is one of the popular external storage specifications. As operating at high frequencies, currents and voltages present in the circuits and the signal traces lead to great Electro-Magnetic Interference (EMI). Hence, Serial-ATA systems require a wide spreading of 5000 ppm and a 30~33 kHz modulation rate. In this thesis, we proposed a Spread Spectrum Clock Generator (SSCG) for Serial-ATA. SSCG is a special technique of frequency modulation to reduce EMI effectively. We use a fractional-N PLL with a digital 3rd order MASH 1-1-1 delta-sigma modulator to accomplish the spread spectrum function. Fractional-N PLL can achieve high resolution with high operation frequency. The use of digital delta-sigma modulation technique in the fractional-N PLL can eliminate spurs. The SSCG generates clocks at 1.5 GHz, a 5000 ppm down spread with a triangular waveform frequency modulation of 33 KHz. The circuit is fabricated with 0.18 um CMOS technology. The non spread spectrum clocking has a measured jitter of 80 ps and the peak amplitude reduction is 23.44 dB in spread spectrum mode.