Summary: | 碩士 === 國立交通大學 === 電子工程系所 === 93 === In the thesis, a System-on-Package (SOP) scheme that integrates the high-Q micro-machined inductors and a proposed low noise amplifier (LNA) circuit (TSMC 0.18um process) to realize a tunable wideband LNA for UWB mode-2 device (3.1GHz ~ 8GHz) is introduced and developed using a low-cost silicon carrier. Due to the use of on-carrier high-Q cross-membrane micro-machined RF inductors, the proposed LNA can have superior characteristics including wider tuning range, lower noise figure (3.5dB), and lower power consumption (10.5mW), and excellent reliability with environmental variation in comparison with the contemporary CMOS wideband LNA. In order to integrate the silicon carrier with the proposed LNA circuit chip, a novel flip-chip technique, Au-Au thermocompression bonding without using solder balls, is also developed and adopted to eliminate the unexpected parasitic effects resulted from the interconnect joints formed by traditional bonding technique. Moreover, the model of the micro-machined RF inductors is also developed for the following IC design. The proposed model is to synthesize the methodologies of Greenhouse’s formula, physics-based closed-form inductance expression, and distributed capacitance model (DCM) to formulate an exactly equivalent circuit model for the micro-machined inductor. Based on the model, circuit designer can achieve an optimum SOP design for RFICs application. Because the overall area of the integrated structure in the SOP scheme is almost equal to that in standard process, it is our belief that the proposed silicon carrier and developed integration technologies in this thesis can provide an alternative choice to IC designer for the future development of high performance IC chips.
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