Improved Clustered Voltage Scaling for Low Power Cell-Based Design

碩士 === 國立交通大學 === 電子工程系所 === 93 === As the semiconductor technologies make progress by scaling-down the feature size,integrated circuits can operate at higher frequencies and achieve higher performance. However, increasing operating frequencies means deteriorating power dissipation problems; moreove...

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Bibliographic Details
Main Authors:	Shwang-Yi Tan, 譚雙議
Other Authors:	Hung-Ming Chen
Format:	Others
Language:	en_US
Published:	2005
Online Access:	http://ndltd.ncl.edu.tw/handle/81648341779259645339

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spelling	ndltd-TW-093NCTU54280982016-06-06T04:10:45Z http://ndltd.ncl.edu.tw/handle/81648341779259645339 Improved Clustered Voltage Scaling for Low Power Cell-Based Design 給低功率元件式設計使用的改良型叢聚式電壓調降法 Shwang-Yi Tan 譚雙議碩士國立交通大學電子工程系所 93 As the semiconductor technologies make progress by scaling-down the feature size,integrated circuits can operate at higher frequencies and achieve higher performance. However, increasing operating frequencies means deteriorating power dissipation problems; moreover, scaling-down causes larger leakage current. Power consumption problems increase the design difficulty for battery powered applications, and also affect ordinary designs in terms of time to market, cost, and reliability. CVS (Clustered Voltage Scaling) is an effective way to reduce IC power consumption. CVS utilizes the excess time slacks inside circuits and trade them for power reduction. Methods based on CVS for saving power have been studied for years. We propose an improved CVS method, Bilateral CVS (BCVS). BCVS is a general Clustered Voltage Scaling method which subsumes both CVS and ECVS. In this thesis, we also discuss why our improvements work by experimental results. Hung-Ming Chen 陳宏明 2005 學位論文 ; thesis 27 en_US
collection	NDLTD
language	en_US
format	Others
sources	NDLTD
description	碩士 === 國立交通大學 === 電子工程系所 === 93 === As the semiconductor technologies make progress by scaling-down the feature size,integrated circuits can operate at higher frequencies and achieve higher performance. However, increasing operating frequencies means deteriorating power dissipation problems; moreover, scaling-down causes larger leakage current. Power consumption problems increase the design difficulty for battery powered applications, and also affect ordinary designs in terms of time to market, cost, and reliability. CVS (Clustered Voltage Scaling) is an effective way to reduce IC power consumption. CVS utilizes the excess time slacks inside circuits and trade them for power reduction. Methods based on CVS for saving power have been studied for years. We propose an improved CVS method, Bilateral CVS (BCVS). BCVS is a general Clustered Voltage Scaling method which subsumes both CVS and ECVS. In this thesis, we also discuss why our improvements work by experimental results.
author2	Hung-Ming Chen
author_facet	Hung-Ming Chen Shwang-Yi Tan 譚雙議
author	Shwang-Yi Tan 譚雙議
spellingShingle	Shwang-Yi Tan 譚雙議 Improved Clustered Voltage Scaling for Low Power Cell-Based Design
author_sort	Shwang-Yi Tan
title	Improved Clustered Voltage Scaling for Low Power Cell-Based Design
title_short	Improved Clustered Voltage Scaling for Low Power Cell-Based Design
title_full	Improved Clustered Voltage Scaling for Low Power Cell-Based Design
title_fullStr	Improved Clustered Voltage Scaling for Low Power Cell-Based Design
title_full_unstemmed	Improved Clustered Voltage Scaling for Low Power Cell-Based Design
title_sort	improved clustered voltage scaling for low power cell-based design
publishDate	2005
url	http://ndltd.ncl.edu.tw/handle/81648341779259645339
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Improved Clustered Voltage Scaling for Low Power Cell-Based Design

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