| Summary: | 碩士 === 國立交通大學 === 電子工程系所 === 93 === As the semiconductor technologies make progress by scaling-down the feature size,integrated circuits can operate at higher frequencies and achieve higher performance. However, increasing operating frequencies means deteriorating power dissipation problems; moreover, scaling-down causes larger leakage current. Power consumption problems increase the design difficulty for battery powered applications, and also affect ordinary designs in terms of time to market, cost, and reliability.
CVS (Clustered Voltage Scaling) is an effective way to reduce IC power consumption. CVS utilizes the excess time slacks inside circuits and trade them for power reduction. Methods based on CVS for saving power have been studied for years. We propose an improved CVS method, Bilateral CVS (BCVS). BCVS is a general Clustered Voltage Scaling method which subsumes both CVS and ECVS. In this thesis, we also discuss why our improvements work by experimental results.
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