Design of On-Chip ESD Protection Circuits with Consideration of Gate-Oxide Reliability

Design of On-Chip ESD Protection Circuits with Consideration of Gate-Oxide Reliability

碩士 === 國立交通大學 === 電子工程系所 === 93 ===

Bibliographic Details
Main Authors:	Wen-Yi Chen, 陳穩義
Other Authors:	Prof. Ming-Dou Ker
Format:	Others
Language:	zh-TW
Published:	2005
Online Access:	http://ndltd.ncl.edu.tw/handle/65542208357281098872

Description
Summary:	碩士 === 國立交通大學 === 電子工程系所 === 93 ===